In the era of deep-learning, tree-based machine learning models continue to be popular in critical domains that require explainability. However, several well-known inference libraries still have room for improvement. It is surprising that only a few automation tools exist for decision tree ensembles, even until very recently. On the other hand, emerging non-volatile memories have been widely studied as an alternative to DRAM or for building in-memory computing units, which bring up disruptive hardware constraints that call for novel maintenance strategies in system software. This keynote will offer insights into hardware-aware mapping strategies that deliver efficiency and memory lifetime for decision trees and emerging memories, as well as their interplay. The talk will conclude with future directions from the perspective of compiler techniques and system software to follow up on.